Tick-tock is a model adopted in 2007 by chip manufacturer Intel. Under this model, every microarchitecture change is followed with a die shrink of the process technology.
Video Tick-tock model
History
Every "tick" represented a shrinking of the process technology of the previous microarchitecture (sometimes introducing new instructions, as with Broadwell, released in late 2014) and every "tock" designated a new microarchitecture. Every year to 18 months, there is expected to be one tick or tock.
In 2014, Intel created a "tock refresh" of a tock in the form of a smaller update to the microarchitecture not considered a new generation in and of itself. In March 2016, Intel announced in a Form 10-K report that it deprecated the tick-tock cycle in favor of a three-step "process-architecture-optimization" model, under which three generations of processors will be produced with a single manufacturing process, with the third generation out of three focusing on optimization. The first optimization of the Skylake architecture was Kaby Lake. Intel then announced a second optimization, Coffee Lake, making a total of four generations at 14 nm.
Intel believes that it will be possible to reach at least 7 nm, perhaps using indium gallium arsenide (InGaAs) or graphene rather than silicon.
Maps Tick-tock model
Roadmap
See also
- List of Intel CPU microarchitectures
References
External links
- "Intel Tick-Tock Model of Architecture & Silicon Cadence". Intel.com. Intel Corporation.
- Intel Tick-Tock Model at IDF 2009, Anandtech.com
- "Intel Tick-Tock Model at IDF 2011" (PDF). Intel.com. Intel Corporation. p. 21.
Source of the article : Wikipedia
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